The present invention is directed to a multi-stage method for manufacturing conductive layers or structures for VLSI circuits on a semiconductor substrate and is also directed to an apparatus for the implementation of the method.
In order to achieve an optimally high integration density in the manufacture of integrated circuits in microelectronics, it is known to arrange the conductive connections between the individual electrical elements of the integrated circuit in planes lying above one another (what is referred to as multi-layer wiring) and to simultaneously miniaturize the lateral dimensions of structures within a plane. The technical realization of this object requires a high degree of leveling of the vertical layer sequence, as set forth in detail in the article by A. Saxena and D. Pramanik in Solid State Technology, October, 1986, pages 95-100. A few methods of the prior art are also described in this article with which conductive and non-conductive layers and structures can be produced on a semiconductor substrate, usually a silicon substrate, these at least partially planarizing the semiconductor surface and, thus, making possible the multi-layer wiring.
What all known methods have in common is that a number of different methods must be implemented in succession in order to produce conductive connections that make possible the multi-layer wiring. This shall be set forth below with reference to the following example.
For producing interconnects, layers of aluminum or of aluminum alloy are usually applied to the surface of the semiconductor substrate with a sputtering process. Layers produced in this manner have a poor step coverage for narrow structures, for example through holes, as a result whereof height differences occur on the semiconductor surface. The sputtered aluminum layer must thereby be subjected to further treatment, for example a flowing of the existing surface by brief-duration heating, or the height difference must be compensated with a subsequently applied, non-conductive layer. In the former instance, the exposure of the aluminum layer to air which is necessary in the prior art leads to a passivating layer that contains aluminum oxide and makes the flowing process difficult. In the second instance, a number of involved methods must be utilized for the manufacture of a planarizing, insulating layer (for example, deposition of silicon oxide, spin-on of an auxiliary layer and curing, re-etching of the auxiliary layer and the silicon oxide layer, and repeated deposition of silicon oxide). This second alternative also has the disadvantage that the interconnects of the next conductive layer to follow cannot be arbitrarily arranged. In particular, the through holes that respectively connect two interconnect levels cannot be stacked above one another.
Improved step coverage of the deposited, conductive layers is therefore desirable both for reasons of electrical reliability of the interconnects as well as for promoting the multi-layer wiring. For this purpose, it is known to produce aluminum layers using a chemical deposition from the vapor phase (what is referred to as a CVD process).
Triisobutyl aluminum (TIBA) can thereby be employed as an initial substance. The method, however, involves considerable disadvantages (see D. Beach, S. Blum, F. LeGoues in Journal of Vacuum Science and Technology, A7(5), 1989, pages 3117-18): the dangerous nature of the initial compound given a low degree of conversion; instability of TIBA at temperatures above 50.degree. C.; simple production of an aluminum alloy is impossible; low deposition rate that requires the use of a multi-wafer system (batch system); and necessity of a nucleation of the surface to be coated, the uniformity thereof on structured surfaces being hardly capable of being assured. Overall, this is an extremely complicated technological process that, produces aluminum layers having a high imperfection density and deficient electromigration resistance. In the above-recited article, the use of trimethylamine aluminum is proposed as an initial substance in a CVD process. However, in order to produce continuous aluminum layers with this process, a preceding nucleation with titanium chloride is also necessary and a uniformity of the aluminum layer is only guaranteed for a thickness greater than 200 nm.
Another problem, known as "spiking" occurs if the aluminum layer is connected to semiconductor substrates that contain silicon or polysilicon. Because of the solubility of silicon in aluminum, silicon diffuses into the aluminum conductor and precipitates out again at a later time. In the state of the art, the interdiffusion of silicon and aluminum is prevented by the deposition of a diffusion barrier formed of titanium nitride or titanium/tungsten, for instance, between the substrate and the aluminum layer at least in contact holes. A titanium nitride film can also promote the preferential development of a (111)-texture in the aluminum films that are subsequently deposited, which increases their stability and electromigration resistance. Titanium nitride films serve also as an adhesive and barrier film for tungsten filled contact holes. More details and a process for producing a titanium nitride film are explained in U.S. patent application Ser. No. 677,124, which is incorporated herein by reference.